POWER SWITCH CONTROL CIRCUIT

专利摘要:
The invention relates to a circuit for controlling transistors (44, 46) in parallel comprising at least two stages (42, 43) each intended to supply a control signal to one of the transistors, in which an output current of each stage is regulated according to the difference between the sum of values representative of the measured output currents of each stage and the sum of values of the setpoints assigned to all the stages.
公开号:FR3078415A1
申请号:FR1851699
申请日:2018-02-27
公开日:2019-08-30
发明作者:Vanni Poletto；David F Swanson；Giovanni Luca Torrisi；Laurent Chevalier
申请人:STMicroelectronics Alps SAS；STMicroelectronics SRL；ST MICROELECTRONICS Inc；STMicroelectronics lnc USA；
IPC主号:

专利说明:

POWER SWITCHES CONTROL CIRCUIT
Field
The present description relates to the field of control circuits and more particularly to control circuits for power switches connected in parallel.
Presentation of the prior art
An H-bridge is an electronic structure used to control the polarity across a dipole, constituting the load and representing the branch of the bridge. The bridge is made up of four switching elements. More specifically, a first terminal of the load is coupled to a first terminal for applying a potential by a first switch and to a second terminal for applying a potential by a second switch. Similarly, the second terminal of the dipole is coupled to the first terminal by a third switch and to the second terminal by a fourth switch.
This structure is found in many applications of power electronics including motor control, converters and choppers, inverters, etc. summary
One embodiment provides a circuit for controlling transistors in parallel comprising at least two stages each intended to supply a control signal to one of the
B16708 - 17-GR2-0479 transistors, in which an output current of each stage is regulated according to the difference between the sum of values representative of the measured output currents of each stage and the sum of setpoint values assigned to all stages.
According to one embodiment, the outputs of the stages of the circuit are regulated so as to be substantially identical.
According to one embodiment, each stage comprises an adder, an operational amplifier and a device for measuring a value representative of its output current.
According to one embodiment, one of the stages comprises a corrector receiving said difference as input.
According to one embodiment, the corrector is an integral proportional corrector.
According to one embodiment, the output of the corrector receiving said difference is supplied to the operational amplifier of each stage, each operational amplifier being adapted to regulate the output current of the corresponding stage.
According to one embodiment, the control circuit is an integrated circuit.
According to one embodiment, at least part of the transistors in parallel forms part of the integrated circuit.
According to one embodiment, each transistor is part of an H-bridge.
According to one embodiment, transistors of each H-shaped bridge are external to the integrated circuit.
According to one embodiment, the instructions of the stages are identical.
According to one embodiment, the circuit comprises between two and six stages.
Another embodiment provides a chip comprising at least one control circuit as described above. Brief description of the drawings
These and other features and advantages will be discussed in detail in the following description of modes of
B16708 - 17-GR2-0479 particular realization made without limitation in relation to the attached figures among which:
Figure 1 illustrates, schematically, a load connected in the branch of three H-bridges in parallel;
FIG. 2 illustrates, schematically and partially, an embodiment of a circuit for controlling a stage of the bridges in FIG. 1;
FIG. 3 illustrates, schematically and partially, another embodiment of a circuit for controlling a stage of the bridges in FIG. 1; and FIG. 4 illustrates an example of application of the embodiments of FIGS. 2 and 3.
detailed description
The same elements have been designated by the same references in the different figures. For the sake of clarity, only the elements useful for understanding the described embodiments have been shown and are detailed. In particular, the control circuits include various elements, for example logic circuits, a microprocessor, etc., which will not be detailed.
In the following description, when referring to qualifiers of absolute position, such as the terms forward, backward, up, down, left, right, etc., or relative, such as the terms above, below, upper , lower, etc., or to orientation qualifiers, such as the terms horizontal, vertical, etc., reference is made to the orientation of the elements concerned in the figures.
Unless specified otherwise, the expressions approximately, substantially, and of the order of mean to 10%, preferably to 5%.
Unless otherwise specified, when reference is made to two elements connected to each other, this means that these elements are directly connected without any intermediate element other than conductors, and when reference is made to two elements
B16708 - 17-GR2-0479 connected or coupled together, this means that these two elements can be directly connected (connected) or connected via one or more other elements.
FIG. 1 illustrates, diagrammatically, a dipole constituting a load 10. The load 10, for example a motor, comprises a terminal 12 and a terminal 14. The load 10 is located in the branch of three H-bridges in parallel.
Each H-bridge comprises a first (IA, IB or IC) and a second (2A, 2B and 2C) switches connected in series between a first (15) and a second (17) terminals for applying a voltage of power supply, the potential of the first terminal 15 being greater than that of the second terminal 17. Each pair of first and second switches of an H-bridge constitutes a set 16A, 16B or 16C. The three bridges also include third 3 and fourth 4 switches, constituting a 16D assembly, common to the three bridges. The third and fourth switches are connected in series between terminals 15 and 17. The first and third switches are connected to the first terminal 15 and the second and fourth switches are connected to the second terminal 17.
In the present description, it is considered that the voltage between terminals 15 and 17 is a positive voltage referenced to ground (terminal 17). However, it is for example possible that the voltage is a negative voltage referenced to ground (terminal 15).
The terminal 12 of the load 10 is coupled to the midpoints of the first and second switches of the three bridges in H. The terminal 14 of the load 10 is coupled to the midpoint of the third 3 and fourth 4 switches common to all the bridges in H parallel.
In the example of FIG. 1, each switch of each set 16A, 16B, 16C and 16D is a transistor.
The transistors of each set 16A, 16B, 16C or 16D are respectively controlled by a circuit 18A, 18B, 18C or 18D. The circuits 18A, 18B, 18C each include a high stage 20A,
B16708 - 17-GR2-0479
20B or 20C supplying a control signal to transistor IA, IB or IC, connected to terminal 15, and a low stage 22A, 22B or 22C supplying a control signal to transistor 2A, 2B or 2C, connected to terminal 17. Likewise, circuit 18D comprises a stage 20D supplying at the output a control signal to transistor 3, connected to terminal 15, and a stage 22D supplying at output a control signal to transistor 4, connected to terminal 17.
Such a structure makes it possible to increase the current supplied to the load 10 while minimizing the heat dissipation and the resistance equivalent to the state passing through the switch.
However, it is preferable that the controls of the transistors having similar functions in the three bridges, for example the transistors IA, IB and IC, are identical, that is to say for example that the outputs of the high stages 2OA, 20B and 20C are identical. If the difference between two control signals is high enough, the temperature or overcurrent limit of one of the bridges can be reached and the system can stop while the limit on all the transistors is not not reached. Such a difference between the control signals of two transistors is for example caused by variations in certain characteristics (threshold voltage, gain, intrinsic capacitances, on-state resistance, operating temperature, individual protection current, etc.) components of the control circuit.
FIG. 2 illustrates, schematically and partially, an embodiment of a control circuit controlling one of the switches of each set 16A, 16B and 16C. More specifically, FIG. 2 illustrates the high stages 20A, 20B and 20C of the circuits 18A, 18B and 18C. The lower stages 22A, 22B and 22C have a similar structure.
Each upper stage 2 OA, 20B and 2 OC includes a feedback mouth supplying an output (IoutA, IoutB and IoutC) controlling the corresponding switch and receiving in
B16708 - 17-GR2-0479 input a setpoint value (IinA, IinB, IinC) of the stage, that is to say a value representative of the current desired at the output.
The output current of each stage is measured by a measuring device 21A, 21B or 21C which provides a value representative of the output current. This value is then subtracted, by an adder 23A, 23B or 23C, from the set value so as to obtain the error eA, eB or eC of the stage.
The errors eA, eB and eC are then added, by summers 25, so as to obtain a total error E. This error E is supplied to a corrector of one of the stages. In the example of FIG. 2, this corrector is a corrector 24A of the stage 20A. The corrector 24A is for example a proportional-integral corrector or a derivative proportional-integral corrector.
Each upper stage 2 OA, 20B and 2 OC comprises an operational amplifier which receives the output of the corrector 24A as an input. The output of the corrector 24A is therefore supplied to three operational amplifiers 26A, 26B and 26C so as to vary their outputs, that is to say the currents IoutA, IoutB and IoutC, until they are substantially identical. .
Additionally, the circuits of the high stages 20B and 20C may also include correctors 24B and 24C, shown in dotted lines, which may be similar to the corrector 24A. The stages 20A, 20B and 20C can also include switches, not shown, between the correctors 24B and 24C and the summers 23B and 23C and between the stages 20B, 20C, on the one hand and 20A on the other hand. Thus, it is possible to choose whether it is desired that stages 20A, 20B and 20C regulate their outputs independently according to the output of their own corrector receiving an input error eA, eB or eC or that the outputs are regulated together depending on the output of a single corrector receiving as input the total error E. It is also possible to choose to regulate certain stages independently and to regulate others together.
B16708 - 17-GR2-0479
Figure 3 illustrates, schematically and partially, another embodiment of a control circuit. Like FIG. 2, FIG. 3 represents the high stages 20A, 20B and 20C of the circuits 18A, 18B and 18C but could also represent the stages 22A, 22B and 22C. Each stage 20A, 20B or 20C comprises, as in FIG. 2, a retroactive loop respectively receiving the set point IinA, IinB or IinC, supplying the current IoutA, IoutB or IoutC and comprising the adder 23A, 23B or 23C, the measuring device 21A , 21B or 21C measuring a value representative of the output current, the operational amplifier 26A, 26B or 26C regulating the output current, and the corrector 24A, 24B or 24C.
The values of the setpoints of stages 2OA, 20B and 2OC are added, by summers 27, so as to obtain an E + value. The values representative of the output current measured at each stage are added by summers 29 so as to obtain a value E-. We subtract, by the summator 23A, the value E- from the value E +. The result obtained in this way is the total error E. This error E corresponds to the error E in FIG. 2. This error E is supplied to the corrector 24A of the stage 20A, the output of which is supplied at the input of the amplifiers operational 26A, 26B and 26C. The currents IoutA, IoutB and IoutC are thus regulated, according to the total error E, so as to be substantially identical.
As previously, the control circuit may include switches, not shown, between the different stages of the circuit and between the correctors 24B and 24C, on the one hand, and the summers 23B and 23C on the other hand. Thus, as described in connection with FIG. 2, it is possible for the different stages to act independently of each other, or to be all regulated according to the output of the corrector 24A.
In the embodiment of FIG. 2 or that of FIG. 3, the instructions of the high (or low) stages of a control circuit can be substantially identical. As a variant, the setpoints of the stages of a control circuit
B16708 - 17-GR2-0479 may be different from each other. Their sum is however equal to the sum of the substantially identical output values desired.
FIG. 4 is an example of application of the embodiments of control circuits of FIGS. 2 and 3.
FIG. 4 represents an integrated circuit chip 40 and motors 51. The motors are for example car motors allowing the opening and closing of windows, doors or trunk, etc.
The chip 40 comprises six circuits each comprising a high stage 42 (42A, 42B, 42C, 42D, 42E, 42F) supplying the control signal of a transistor 44 (44A, 44B, 44C, 44D, 44E, 44F) and a low stage 43 (43A, 43B, 43C, 43D, 43E, 43F) supplying the control signal of a transistor 46 (46A, 46B, 46C, 46D, 46E, 46F). Transistors 44 and 46 constitute the first and second H-bridge switches. Each pair of transistors 44 and 46 is connected in series between a first (56) and a second (57) terminals for applying a supply voltage. , as described in relation to the figure
1.
The chip 40 further comprises a circuit comprising a stage 48 supplying the control signal of a transistor 50 and a stage 52 supplying the control signal of a transistor 54. The transistors 52 and 54 constitute the third and fourth switches common to all of the H bridges. The transistors 50 and 54 are connected in series between a first (56) and a second (57) terminals for applying a supply voltage, as has been described in relation with figure 1.
Transistors 44 and 46 are transistors located in the integrated circuit. Transistors 50 and 54 are transistors external to the integrated circuit. Indeed, the transistors 50 and 54 being common to all the H-bridges, they must dissipate more heat than each set of two transistors 44 and 46. Transistors external to the integrated circuit can more easily dissipate the heat from all of the H bridges
B16708 - 17-GR2-0479
The H-bridge comprising the transistors 44A and 46A and that comprising the transistors 44F and 46F are not in parallel with any other bridge and their respective load is a single motor.
The node between transistors 44B and 46B, and that between transistors 44C and 46C are connected and the two corresponding H-bridges are in parallel. The common load of these two bridges in parallel comprises five motors.
The H-bridges comprising the transistors 44D, 46D, 44E and 46E are also in parallel and their common load comprises three motors.
An advantage of the embodiments described above is that the risk of reaching the temperature or overcurrent limit of one of the bridges and therefore of stopping the system is less.
Particular embodiments have been described. Various variants and modifications will appear to those skilled in the art. In particular, although FIGS. 2 and 3 show control circuits comprising three stages, the number of stages, and therefore of transistors in parallel controlled by the control circuit, can be other than three. For example, the number of stages can be between two and six.
In addition, the control circuits described control transistors constituting H-bridges, the embodiments described are nevertheless adaptable to circuits controlling any structure of transistors in internal or external parallel to the integrated circuit. An embodiment in which terminal 14 (Figure 1) is connected to ground, a power source or another circuit is also possible.
Various embodiments with various variants have been described above. Note that those skilled in the art can combine various elements of these various embodiments and variants without showing inventive step.

权利要求:
Claims (10)
[1" id="c-fr-0001]
1. Control circuit for transistors (44, 46) in parallel comprising at least two stages (42, 43) each intended to supply a control signal to one of the transistors, in which an output current of each stage is regulated according to the difference between the sum of values representative of the measured output currents of each stage and the sum of setpoint values assigned to all stages.
[2" id="c-fr-0002]
2. The circuit as claimed in claim 1, in which the outputs of the stages of the circuit are regulated so as to be substantially identical.
[3" id="c-fr-0003]
3. The circuit as claimed in claim 1 or 2, in which each stage comprises an adder (23), an operational amplifier (26) and a device (21) for measuring a value representative of its output current.
[4" id="c-fr-0004]
4. The circuit as claimed in claim 3, in which one of the stages comprises a corrector (24A) receiving as input said difference.
[5" id="c-fr-0005]
5. The circuit as claimed in claim 4, in which the corrector is an integral proportional corrector.
[6" id="c-fr-0006]
6. The circuit as claimed in claim 4 or 5, in which the output of the corrector receiving said difference is supplied to the operational amplifier of each stage, each operational amplifier being adapted to regulate the output current of the corresponding stage.
[7" id="c-fr-0007]
7. Circuit according to any one of claims 1 to 6, wherein the control circuit is an integrated circuit.
[8" id="c-fr-0008]
8. The circuit of claim 7, wherein at least a portion of the transistors in parallel is part of the integrated circuit.
[9" id="c-fr-0009]
9. Circuit according to any one of claims 1 to 8, in which each transistor is part of an H-bridge.
[10" id="c-fr-0010]
10. The circuit of claim 9, wherein the transistors of each H-bridge are external to the integrated circuit.
B16708 - 17-GR2-0479
at 10, 11. Circuit according to any one of claims 1 in which the setpoints of the stages are identical.12. Circuit according to any one of claims 1 at 11, in which the circuit comprises between two and six stages. 5 13. Chip comprising at least one control circuit according to Moon any of claims 1 to 12.
B16708 17-GR2-0479

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法律状态:
2019-01-23| PLFP| Fee payment|Year of fee payment: 2 |

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2019-08-30| PLSC| Publication of the preliminary search report|Effective date: 20190830 |

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2020-01-22| PLFP| Fee payment|Year of fee payment: 3 |

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2021-01-20| PLFP| Fee payment|Year of fee payment: 4 |

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2022-01-19| PLFP| Fee payment|Year of fee payment: 5 |

优先权:

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申请号 | 申请日 | 专利标题

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FR1851699A|FR3078415B1|2018-02-27|2018-02-27|POWER SWITCH CONTROL CIRCUIT|

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FR1851699|2018-02-27|FR1851699A| FR3078415B1|2018-02-27|2018-02-27|POWER SWITCH CONTROL CIRCUIT|

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US16/274,844| US10560092B2|2018-02-27|2019-02-13|Control circuit for power switch|

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EP19159837.4A| EP3531228A1|2018-02-27|2019-02-27|Power switch control circuit|

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US16/719,053| US10917087B2|2018-02-27|2019-12-18|Control circuit for power switch|